Thanks,
Here is the corrected schematic.
And the MCU part:
And im gonna keep trying until it is 100% correct 
Added snubber cap, changed Bootstrap caps to 100nF
Corrected the pwm pins.
is it time to route yet? (Cant wait to do it)
Yes.
Cheers,
Valentine
Perhaps a stupid question.
Why are you trying to go for 3PWM instead of 6PWM?
Cheers,
Valentine
To simplify things a bit, essentially 3 less probes to debug.
Also read this thread
IRS2003 supports 3 pwm setup, makes the schematic a tad bit less complex. (I’ve gone through the timing diagrams, while it does support 6pwm mode, Hi and Li_bar pins still can be used in negation to achieve the 3 pwm effect)
Am I missing something?
Not really. But 6pwm allows for more flexibility. You can always adapt later to 6pwm. Let’s table this topic. Focus on routing.
Cheers,
Valentine
Aye aye sir!
First iteration of routing :
4 Layers (POWER - POWER - GND - SIGNAL)
79.5 x 77 mm
Data via 50mil/30mil
Stitching via 0.5mm/0.3mm
Layer stack and vias:
3D view :
Layers:
-
Top:
-
Inner Top:
-
Inner Bottom:
4)Bottom:
Current sense tracks:
Pwm tracks:
-
Question, using Altium?
-
POWER - POWER - GND - SIGNAL
You are probably getting way ahead of the needs of the design. Don’t worry what’s what, just route it.
This is a mixed analog/digital so what you may have learned in school doesn’t really apply here.
If you really want to do it, you probably want
POWER/GND - SIGNAL/GND - SIGNAL/GND - POWER/GND
Let me check the rest.
- Question: Are you sure you want to make it dual sided SMD? It’s going to be REALLY expensive. Unless you solder yourself.
Valentine
PS
I don’t see anything that stands out. It’s a little hard to gauge since it’s altium screenshots but it should work. One thing, you put way too many vias everywhere, you may want to think about placing them manually.
Do I see blind/buried vias? They are really cool, but for your design probably not necessary. Also they increase the cost of the PCB so much. I would really like to play around with those, but after seeing the $500 price tag on getting them manufactured my wallet couldn’t take it anymore and I had to limit myself to using only through holes.
I believe this is Altium standard way of showing the default layers, but yes, JLC don’t even make blind/buried vias. I didn’t see any in the design pictures but may be there are.
Using Altium for such projects is like shooting a mosquito with a cannon.
Cheers,
Valentine
1 Like
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Yes, I’m sponsored by Altium, I make all my designs in Altium.
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Regarding the layer stack, even if i state top layer to be “Power” it still has ground plane in it.
Everything is routed as is without giving any priority to “power” first. -
Yes, I will not be getting it PCBA ordered, I’ll solder everything myself. It’s a fun weekend activity for me, hence dual sided components.
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Stitching is generated by Altium automatically, while I can constrain the region of stitching, I don’t see any problem with extra stitching. Increases overall copper on the board.
The blind vias I saw were on BAT+ near the screw terminal. There’s a whole patch of them.
Using Altium for such projects is a good way to get experience with the software and it might help you get a job easier, as many companies are using Altium and not KiCad or EasyEDA.
Using Altium might even have some other benefits as well, such as the ability to do thermal analysis of the boards. It’s probably worth using for my new motor driver using RDS(on) current sensing, but I ended up just doing the thermal calculations by hand (ended up with max 20degc difference between temp sensor and MOSFET junction temp).
I’ve used Altium for some university projects in the past, and I can say once you get used to the interface it should be just as good as any other software.
Jlcpcb once printed by board of burried vias without any extra cost. Also, I’m getting these boards printed from a local vendor, who provides blind/burried vias without any extra cost.
PS I am not a beginner in PCB designing, I’ve been doing it for 6 years now. To Altium or not To Altium is not in scope because like I mentioned, I’m sponsored by Altium. it’s tools are now in my muscle memory, also I personally do not like any other softwares.
Hello Andrew and Valentine,
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Now Switching to a Power/Gnd - Signal - Signal - Power/Gnd stack, without burried vias.
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Will try to add stitching manually this time to avoid huge amount of vias.
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Will add M3 mounting holes at all corners
I will share the next iteration of routing soon.
Thanks
Which vendor is that? Do they also SMD?
Cheers,
Valentine
It’s called robu.in , the warehouse of it is in same city that I live in. Hence I get a lovely 1 day delivery for components.
I doubt if it ships internationally. My last order of blind/burried vias from them for a 4 Layer board 100*100mm was Rs.1600, which is about $20
I’ve had a look at the robu.in website, and I think what they do is just forward your orders to JLCPCB and then ship them back to you. They might be combining shipping with other customers orders to save costs, due to their long lead times. I am assuming this is what is happening as most of the text on their PCB order page is copied and pasted straight from JLCPCB. (https://robu.in/product/online-pcb-manufacturing-service/)
Their website also clearly states they don’t support blind/buried vias, the page is also copied and pasted straight from JLCPCB, although it’s an older version of JLCPCB capabilities. (https://robu.in/pcb-manufacturing-capabilities)
I highly doubt they are able to produce blind/buried vias, but just to confirm, are you able to send a photo of your previous board, circling the location of the blind via on both sides? You should see the via on one side of the board but not the other. Unfortunately if your board only used buried vias it will be harder to verify, but you can try testing for continuity with a multimeter.
I suspect your blind/buried vias were either converted to through holes, or they were not manufactured at all. JLCPCB sometimes messes with your files before production, so they could have moved some of your other traces around to make room to convert the blind/buried vias into a through hole. You can choose the confirm production file option if you want to check what they did and reject the changes if unsatisfied.
Please report back with your findings, I am very interested to get to the bottom of this story.
Hello all,
Iteration 2:
4 layers : Power/GND → Signal (Digital power + pwm lines)/GND → signal (ADC Lines)/GND → Power/GND
83x83mm
3D view:
Top Layer:
Inner Top:
Inner Bottom:
Bottom:
Please review.
Most probably the case. The vias are plugged by default so you can’t tell if it was a through via or not to begin with.
Valentine