QVADRANS v1.0 (fka Lepton 3.0)

You’re probably better off using the generic stm32g4 implementation unless the current sense is routed to pins that only have opamps and not ADC inputs.

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:frowning:
Should I pay it, or try to modify the design, or try to persuade them to do it without paying more? Maybe it’s just a money grab? I have no idea, I don’t order boards very often…

I may have made a mistake submitting the order, it’s really not clear.

My main concern is not trying to prematurely validate a design that still warrants changes. That would be inefficient.

Should I try to get in there and make the vias bigger and resubmit? They are about 0.2 mm diameter, I had a look. To be fair that’s pretty small I guess.

Thanks for placing your order on JLCPCB.COM.

You need to pay additional 34.85 for your order. QVADRANS BLDC SIMPLEFOC DRIVER_PCB__20240628133142.zip_Y8【4494872A_Y8】

Reason:

1.There are minimun hole size of 0.2 mm, with a diameter of 0.4 mm in your file, to ensure the quality for your order, the 4-Wire Kelvin Test is recommended,so you may need to pay for an extra cost for it.

Please note that this batch order won’t be put into production if funds have not been received.

How to pay:

@Anthony_Douglas

You can email them and tell them to ignore the 4-wire test and just make it. Tell them you accept the risks. Some time whoever does the dfm is very anal and try to get extra money from the customers.

There are no vias 0.2 mm, they are lying. The smallest via is 0.25mm.

Valentine

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I have checked the PCB files on OSHWLab, there are a few errors in the file so that’s probably why JLCPCB is complaining. To find the 0.2mm hole vias, open up the design rules:
image
Change via drill diameter to 0.25mm
Note: 0.25mm hole vias cost extra from JLCPCB, the free vias have diameter 0.45mm and drill 0.3mm


Then go back to the previous design menu and click Check DRC. It will highlight with a cross which vias are too small.

There is also a via overlapping with a PTH (on PA11), so the via will need to be removed, otherwise there is a risk it will not be manufactured correctly.
image

Also the copper to board outline is 0.15mm. This is smaller than JLCPCB’s capability of 0.3mm, which means you might end up with exposed layers on the sides of the PCB, which could cause shorts if the edge of the PCB touches some metal. It is up to you whether this is acceptable or not.
If you are using VCUT panelisation (due to PCB assembly), the copper to board outline needs to be greater than 0.4mm on the sides which have VCUT.

Also I’d suggest adding more vias under the STM32 (suggest around 10), and filling in the inner layers under the STM32 completely with GND, this will improve the thermal and noise performance of the board.

Also you should replace the TVS diode with a unidirectional one, to better protect against reverse voltage.

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Ok, I will slate this for doing later, unfortunately I can’t do it now. I’m open to paying someone to do such things, I am supposed to make 10 fully functional fans by july 23 and I don’t think I’m going to make it…I may be able to do that with b-g431-esc1 boards but the current measurement is too noisy for the sensorless approach I’ve been using.

0.25 drill / 0.40 aperture are free on JLC with 4-layer boards!

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Doesn’t seem free for me, maybe it is different is some countries?


Sorry, I was mistaken, it is 0.2 / 0.45, not 0.25 / 0.4

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@Anthony_Douglas

I fixed all minor issues everyone noticed, except the TVS diode, that one stays bidirectional. I disagree with the reverse voltage suggestion.

Most importantly, the vias are now 250/450 microns, that should be sufficient not to trigger the JLC warning.

Let me know how it goes.

Cheers,
Valentine

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One more thing, if you’re going to stick to split ground, try to route DGND close to CSx and 3.3V, this way all 3 traces will be very close to each other and it will improve noise immunity slightly.

Thanks, I will look into this when I get time.

Cheers,
Valentine

Also I found this MOSFET which you can consider switching to, to save cost, DMN3009LFVW-7 $0.2255 each, the original dual mosfet cost $0.42 each, and you used 2 of them. Switching to this one will also make your gate traces routing less messy and should reduce ringing.

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That’s future improvement, thank you. I don’t have time for that now unfortunately.
This is not a production grade design.

Cheers,
Valentine

ok this is awesome, I feel bad for not doing it, I have been having difficulty being extremely tired and also have deadlines looming :(. However I am in this for the long haul, I think it is a sound design that is the outcome of a long constructive process and has a lot of wisdom built into it now which is really going to pan out.

I’ll go through the process of placing the order, carefully of course and with less dumbness and impatience than last time, very soon.

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Ok order placed!

I got the DHL shipping option, I’ll have to pay the brokerage fees and customs but it should get here by july 17, they said, whereas the other shipping option was an extra 10 days or so.

I’ll prep for arrival by refreshing my memory on how to program STM32 and get it working with Arduino etc. :slight_smile: Stoked! I’m grateful to be part of laying a tiny bit of foundation that hopefully many others will appreciate and stand upon, as I have many times with many other things :).

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