PC817 as PWM Isolator

@pipe,

Thank you. Just a disclaimer, I am not questioning or criticizing your design, only trying to understand the problem.

What issues are you having and have you proven with an oscilloscope and logic analyzer it’s real external noise that’s causing them? I2C is a very tricky protocol, it’s primarily designed for on-circuit communication, not over a wire (Inter-to-Circuit stands for I2C). Think at most a few centimeters. Using I2C outside the PCB over a wire will immediately create issues regardless of what your setup is. Perhaps using shielded twisted pair on low I2C speed over a short distance will fix your problem? Galvanic isolation won’t help.

More specifics please, if possible? I know many people work on proprietary designs, so I’m only curious.

Which input voltage, to the MCU I assume? B0505LS barely puts out 200mA. Why do you need that, if your MCU power supply is already designed properly? B0505LS are used in very niche, specific cases. Have you proven your MCU voltage is that dirty?

These are really old, discontinued drivers. They have slow response time to PWM. Be careful with them. Just a side comment, that’s all.

Cheers,
Valentin

Edit: One last thing, all IFX/BTN/BTS drivers have the same problem where the power ground is also logic ground, so you must take extra care to disconnect them. Have you done that? Else, you will get PWM output bleeding through ground back into whatever is connected. I believe in another thread I posted an MCU that burst because I didn’t do that, luckily that was just an experiment, and noone got hurt.

6.2 Layout Considerations
Due to the fast switching times for high currents, special care has to be taken to the PCB
layout. Stray inductances have to be minimized in the power bridge design as it is
necessary in all switched high power bridges. The BTS 7960 has no separate pin for
> power ground and logic ground. Therefore it is recommended to assure that the offset
between the ground connection of the slew rate resistor, the current sense resistor and
ground pin of the device (GND / pin 1) is minimized. If the BTS 7960 is used in a H-bridge
or B6 bridge design, the voltage offset between the GND pins of the different devices
should be small as well.
A ceramic capacitor from VS to GND close to each device is recommended to provide
> current for the switching phase via a low inductance path and therefore reducing noise
> and ground bounce. A reasonable value for this capacitor would be about 470 nF.
The digital inputs need to be protected from excess currents (e.g. caused by induced
voltage spikes) by series resistors in the range of 10 kΩ.