Understanding of current sensing and center aligned pwm

Hi all.

I’m to the topic of FOC at all, so there arise some questions :wink:

One question is: what ist the best point in time to sampel the phase currents. I read about center aligned pwm and there - I think - all phase currents are measured when all HighSide Fets are on (in the center of the pwm pulses). But then there is no current through the coils, since all are on Vs level.

What am I missing?


You can read the docs maybe

Really great documentation, cool!!!

But sadly I did not find an answer to my question: I am low-side measuring as with the ESC-G431 board, and in the docs its says, that measuring must occur when all LS- Fets are on. But in this case the same assumption holds: there is no current, as all phases are low.
But maybe I am missing the inductance of the coil?

What kind of current sensing are you using Low side or High side current sensing?

Maybe there is a poor wording or misunderstanding - the current sense in low side sensing doesn’t need to happen when all bridges are low, but rather the bridge you want to measure must have the low-side FET on, so that there is current going into th sense resistor (creating voltage drop across). The other bridges can have the high side turned on.

I’m using LS-sensing.

In my understanding one has to measure in the one or two LSs, when they are on, and the one or two other HSs are on.

On the STM32G431 this can be trigerred by a fourth / fifth CC channel of the same timer generating the pwm.

Yes I think you’ve understood it correctly.