Sorry to bump yet another old thread but this topic has been in my mind for a long time.
I come from a firmware that was able to sample the phase current synchronously and run the complete FOC algorithm in half a PWM period at 16Khz without a FPU thanks to fixed point math.
I agree that this is not necessary, but I think different parts of FOC algorithm have different criticality, and SimpleFOC could benefit from splitting the algorithm.
I just came accross a nice diagram in a paper that highlights this:
So this could be part of the fast loop and running in the interrupt:
- sampling of the phase currents (you don’t even need to convert adc to voltage here)
- possibly non HW critical fault detection (e.g. cycle by cycle current limitation/chopping)
- sensor update/angle prediction (as close to the current sampling as possible)
- inverse Park (possibly with another angle prediction as the angle will have changed until the duty cycles are applied as discussed with @dekutree64)
- inverse Clarke
- SVPWM
- apply duty cycles
This ensures the duty cycles are updated as fast as possible, and that the phase current and angle are as close as possible, not introducing lag in the d axis.
This part is the one that will benefit most from optimization (use less float, cordic, fixed point math,…).
In the slower loop, as you mentioned, this doesn’t have to run so fast:
- Clarke transform
- Park transform
- d and q filters
- d and q PI controllers
- feedforward terms like lag compensation and BEMF compensation
- possible current/voltage saturation/limitation
And the move function can already be downsampled to run even slower than the slow loop.
I think this could make the main loop less time critical also.
As always, please move this post if it’s too off topic 